5. Storage and other I/O

5์žฅ Storage and Other I/O Topics ๊ฐœ์š”

์ปดํ“จํ„ฐ ์‹œ์Šคํ…œ์—์„œ I/O๋Š” ๋””์Šคํฌ, ๋„คํŠธ์›Œํฌ, ๊ทธ๋ž˜ํ”ฝ ๋“ฑ ์™ธ๋ถ€ ์„ธ๊ณ„์™€ ๋ฐ์ดํ„ฐ๋ฅผ ์ฃผ๊ณ ๋ฐ›๋Š” ๋ชจ๋“  ์žฅ์น˜๋ฅผ ์˜๋ฏธํ•œ๋‹ค. ์ด ์žฅ์—์„œ๋Š” I/O์˜ ๊ธฐ๋ณธ ๊ฐœ๋…, Dependability(์˜์กด์„ฑ), Interrupt/Polling/DMA์˜ ์ „์†ก ๋ฐฉ์‹, RAID ๊ตฌ์„ฑ๊นŒ์ง€ ๋‹ค๋ฃฌ๋‹ค.

Introduction

I/O ์žฅ์น˜๋Š” ๋‹ค์Œ ์„ธ ๊ฐ€์ง€ ์ถ•์œผ๋กœ ํŠน์„ฑํ™”๋œ๋‹ค.

  • Behavior: input, output, input/output, or storage
  • Partner: human, machine
  • Data rate: byte/sec, transfer/sec

I/O Bus Connections

[Processor]โ”€โ”€โ”€[TLB / PA / Cache]
      โ”‚
[Memory-I/O Interconnect]
      โ”‚
โ”Œโ”€โ”€โ”€โ”€โ”€โ”ผโ”€โ”€โ”€โ”€โ”€โ”ฌโ”€โ”€โ”€โ”€โ”€โ”€โ”ฌโ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”€โ”
Main  I/O    I/O    I/O       
memory controller  controller controller
      โ”‚     โ”‚      โ”‚
     Disk  Graphics  Network
          output

Interrupt๋Š” event ๋ฐœ์ƒ ์‹œ Processor๋กœ ์ „๋‹ฌ๋œ๋‹ค.

Diverse I/O Devices (Data rate ๋น„๊ต)

Device Behavior Partner Data rate (Mbit/sec)
Keyboard input human 0.0001
Mouse input human 0.0038
Voice input input human 0.2640
Sound input input machine 3.0000
Graphics display output human 800~8000
Network/LAN input/output machine 100~10000
Optical disk storage machine 80~220
Flash memory storage machine 32~200
Magnetic disk storage machine 800~3000

Dependability (์˜์กด์„ฑ)

์‹œ์Šคํ…œ์ด ์ง€์ •๋œ ์„œ๋น„์Šค๋ฅผ ์‹ ๋ขฐ์„ฑ ์žˆ๊ฒŒ ์ œ๊ณตํ•˜๋Š” ๋Šฅ๋ ฅ. ๋‹ค์Œ ๋‘ ์ƒํƒœ ์‚ฌ์ด๋ฅผ ์™•๋ณตํ•œ๋‹ค.

Service accomplishment โ†” (Failure / Restoration) โ†” Service interruption
  (specified service)                              (deviation from specified)
  • Fault: Component๊ฐ€ failure๋ฅผ ์ผ์œผํ‚ค๋Š” ๊ฒƒ โ†’ System failure๋กœ ์ด์–ด์งˆ ์ˆ˜๋„/์ด์–ด์ง€์ง€ ์•Š์„์ˆ˜๋„ ์žˆ์Œ. System์ด down๋  ์ˆ˜ ์žˆ์Œ.
  • Noise, ๊ณต์ •์ƒ ๋ฌธ์ œ โ†’ Error. ๋Œ€๋ถ€๋ถ„์€ SW error๊ฐ€ ๋งŽ์Œ.

Dependability Measures

  • Reliability (์‹ ๋ขฐ๋„): failure๊นŒ์ง€์˜ ์‹œ๊ฐ„ โ†’ MTTF (Mean Time To Failure)
  • Service Interruption: failure ๋ฐœ์ƒ ํ›„ ๊ณ ์น˜๋Š” ์‹œ๊ฐ„ โ†’ MTTR (Mean Time To Repair)
  • MTBF (Mean Time Between Failures) = MTTF + MTTR (failure ์‚ฌ์ด์˜ ์‹œ๊ฐ„)
  • Availability (์ด์šฉ๋ฅ ):

$$\text{Availability} = \frac{\text{MTTF}}{\text{MTBF}}$$

MTTF ํ–ฅ์ƒ ๋ฐฉ๋ฒ• โ€” ์˜ˆ์ธกํ•˜์—ฌ ํšŒํ”ผ

  • Fault avoidance: ํ”ผํ•˜๊ธฐ
  • Fault tolerance: Fault๊ฐ€ ๋‚˜๋„ failure๋กœ ๊ฐ€์ง€ ์•Š๊ฒŒ (์—ฌ๋Ÿฌ ๊ฐœ ๋งŒ๋“ค์–ด ๋†“๊ณ  ์‚ฌ์šฉ, redundancy)
  • Fault forecasting: ์˜ˆ์ธก

MTTR ์ค„์ด๋Š” ๋ฐฉ๋ฒ•

Failure๋ฅผ ์ง„๋‹จํ•˜๊ณ  ์ˆ˜๋ฆฌํ•˜๋Š” ํˆด์ด๋‚˜ ํ”„๋กœ์„ธ์„œ๋ฅผ ํ–ฅ์ƒ์‹œํ‚ค๊ธฐ.

I/O Topics ๋ฐ Dependability

I/O Management

I/O Commands โ€” I/O Controller Registers

๊ฐ I/O ์žฅ์น˜๋Š” command register, status register, data register๋ฅผ ๊ฐ€์ง„๋‹ค. CPU๊ฐ€ ์ด ๋ ˆ์ง€์Šคํ„ฐ์— read/writeํ•˜์—ฌ ์žฅ์น˜๋ฅผ ์ œ์–ดํ•œ๋‹ค.

  • Command register: I/O controller์—๊ฒŒ ์–ด๋–ค ์ผ์„ ํ• ์ง€ ์ง€์‹œ
  • Status register: I/O ์™„๋ฃŒ ์—ฌ๋ถ€, error ์—ฌ๋ถ€ ๋“ฑ
  • Data register: ์ฃผ๊ณ ๋ฐ›์„ ๋ฐ์ดํ„ฐ (read/write)

I/O Register Mapping (๋ฉ”๋ชจ๋ฆฌ ์ž…์ถœ๋ ฅ ๋งคํ•‘)

I/O controller register๋ฅผ ๋ฉ”๋ชจ๋ฆฌ ์ฃผ์†Œ ๊ณต๊ฐ„์— ๋งคํ•‘ํ•ด์„œ ์ผ๋ฐ˜ load/store ๋ช…๋ น์–ด๋กœ I/O ์ œ์–ด. ์ด๋ฅผ memory-mapped I/O๋ผ๊ณ  ํ•จ.

  • ๋ฉ”๋ชจ๋ฆฌ์™€ I/O register๊ฐ€ ๊ฐ™์€ address space ๊ณต์œ 
  • CPU ์ธํ„ฐํŽ˜์ด์Šค ๋ณต์žก๋„ ๊ฐ์†Œ

Polling

CPU๊ฐ€ status register๋ฅผ ์ฃผ๊ธฐ์ ์œผ๋กœ checkํ•ด I/O ์žฅ์น˜์˜ ์ƒํƒœ๋ฅผ ํ™•์ธ.

  • ์žฅ์ : ๊ตฌํ˜„ ๊ฐ„๋‹จ
  • ๋‹จ์ : CPU resource ๋‚ญ๋น„ (๋‹ค๋ฅธ ์ผ ๋ชปํ•จ)

I/O Management ๋ฐ Polling

Interrupts

Device์˜ ready๋‚˜ error ๋ฐœ์ƒ ์‹œ status register๋ฅผ CPU๊ฐ€ ์ฒดํฌ X, interrupt controller๊ฐ€ ์ฒดํฌ. Event ๋ฐœ์ƒ ์‹œ CPU์—๊ฒŒ ์•Œ๋ ค์คŒ.

Interrupt vs Exception

Interrupt๋Š” exception๊ณผ ์œ ์‚ฌ (์ฒ˜๋ฆฌ ๋ฐฉ์‹์ด ์œ ์‚ฌํ•˜๊ธฐ ๋•Œ๋ฌธ์—). ์ฃผ๋กœ I/O์— ์˜ํ•ด ๋ฐœ์ƒ.

  • Interrupt๋Š” instruction์˜ ์ˆ˜ํ–‰๊ณผ ๋™๊ธฐํ™”๋˜์ง€ ์•Š์Œ (ํ˜„์žฌ ์ˆ˜ํ–‰ํ•˜๋Š” ๊ฒƒ๊ณผ ๊ด€๊ณ„ X)
  • Instruction ์‚ฌ์ด์—์„œ handler๊ฐ€ ๊ฐœ์ž… ๊ฐ€๋Šฅ (Instruction ์ˆ˜ํ–‰ ์ค‘ ๋Š๋Š” ๊ฒŒ ์•„๋‹Œ, instruction์ด ๋๋‚˜๊ณ  ๋‹ค์Œ instruction ์ˆ˜ํ–‰ ์‹œ interrupt ์ฒ˜๋ฆฌ)
  • Interrupt signal์€ ํ•œ ๊ฐœ๋งŒ ์กด์žฌ โ†’ CPU๊ฐ€ interrupt๋ฅผ ๋ฐœ์ƒ์‹œํ‚จ ๊ฒƒ์„ ์ฐพ์•„ ์ฒ˜๋ฆฌ

Priority Interrupt

๊ธด๊ธ‰ํ•œ ์ฒ˜๋ฆฌ๊ฐ€ ํ•„์š”ํ•œ device๋“ค์ด ๋” ๋†’์€ ์šฐ์„  ์ˆœ์œ„๋ฅผ ๊ฐ€์ง. ๋‚ฎ์€ ์šฐ์„  ์ˆœ์œ„์˜ interrupt ์ˆ˜ํ–‰ ์ค‘์—๋„ ์ˆ˜ํ–‰ ๊ฐ€๋Šฅ.

I/O ์ฒ˜๋ฆฌ๋Š” Interrupt ์ฒ˜๋ฆฌ์™€ ๊ฐ™๋‹ค.

I/O Data Transfer (Data register์™€ Memory ์‚ฌ์ด์—์„œ ์ผ์–ด๋‚˜๋Š” ์ผ)

โ‘  Polling & Interrupt-Driven I/O

CPU๊ฐ€ I/O์™€ Data register ์‚ฌ์ด์—์„œ ๋ฐ์ดํ„ฐ๋ฅผ ์ฝ๊ณ  ์”€ โ†’ CPU๊ฐ€ ์ˆ˜ํ–‰ํ•˜๊ธฐ์— ์‹œ๊ฐ„์„ ๋งŽ์ด ์†Œ๋ชจ.

์˜ˆ: Page fault ์‹œ CPU โ†’ Command register โ†’ HDD I/O Controller (HDD Data โ†’ data R) โ†’ CPU (data R โ†’ Memory์˜ ํ•œ ์˜์—ญ). ์ด ๊ณผ์ •์ด CPU ๋‚ญ๋น„ โ†’ DMA๋กœ ๋Œ€์‹ ํ•˜๊ฒŒ ๋จ.

โ‘ก DMA (Direct Memory Access)

์ผ์ข…์˜ I/O, Command R & Status R ์กด์žฌ. But data R์€ ๋ณดํ†ต ์กด์žฌ X.

HDD I/O Controller๊ฐ€ ์ฝํžŒ ๋ฐ์ดํ„ฐ๋ฅผ data R โ†’ Memory์˜ ํ•œ ์˜์—ญ์œผ๋กœ ์˜ฎ๊ธฐ๋Š” ์—ญํ• .

  • OS๊ฐ€ DMA์—๊ฒŒ Starting address, Size, ๋Œ€์ƒ I/O controller ์ •๋ณด๋ฅผ DMA์˜ Command register๋ฅผ ํ†ตํ•ด ์•Œ๋ ค์ฃผ๋ฉด DMA๊ฐ€ ์—ญํ•  ์ˆ˜ํ–‰
  • Special I/O Controller (data R๊ฐ€ ์—†๊ธฐ ๋•Œ๋ฌธ)
  • Error ๋ฐœ์ƒ ์‹œ, interrupt๋ฅผ ํ†ตํ•ด CPU์—๊ฒŒ ์•Œ๋ ค์คŒ โ†’ interrupt controller๊ฐ€ ์žˆ์œผ๋ฉด ๊ทธ๊ฒƒ์„ ํ†ตํ•ด

Interrupts ๋ฐ I/O Data Transfer

DMA์™€ Cache/VM Interaction

DMA/Cache Interaction

DMA๊ฐ€ cached location์„ ์ฝ์„ ๋•Œ, Memory๋Š” ์ตœ์‹ ์ด ์•„๋‹ ์ˆ˜ ์žˆ์Œ (cache์— dirty) โ†’ Cache๋ฅผ flush ํ•ด์•ผ ํ•จ.

  • DMA๊ฐ€ cached location์— write โ†’ Cache์˜ copy๋Š” stale (๋ฌดํšจํ™” ํ•„์š”)
  • Cached location์„ ์ž˜๋ชป ์ฝ์ง€ ์•Š๋„๋ก flushing ํ•„์š”

ํ•ด๊ฒฐ

  • DMA๊ฐ€ ์‹œ์ž‘๋˜๊ธฐ ์ „ ํ•ด๋‹น ๋ฌผ๋ฆฌ ๋ฉ”๋ชจ๋ฆฌ ์˜์—ญ์„ Flushing (cache์— dirty data ์žˆ์œผ๋ฉด memory๋กœ write-back)
  • DMA ๋๋‚œ ํ›„, invalidate (cache์˜ stale copy ๋ฌดํšจํ™”)
  • Non-cacheable region์œผ๋กœ ์ง€์ •ํ•  ์ˆ˜๋„ ์žˆ์Œ

DMA/VM Interaction

OS virtual memory ํ™˜๊ฒฝ์—์„œ DMA๋Š” physical address ๊ธฐ์ค€์œผ๋กœ ๋™์ž‘.

  • VM์˜ ํ•œ page๊ฐ€ ์—ฌ๋Ÿฌ frame์— ๊ฑธ์น  ์ˆ˜ ์žˆ์Œ โ†’ DMA๋Š” page ๋‹จ์œ„๋กœ ๋ถ„ํ• ํ•ด์„œ ์ „์†กํ•ด์•ผ ํ•จ
  • Use multiple handlers / physical page๋„ ์—ฌ๋Ÿฌ ๋ฒˆ ๋‚˜๋ˆ ์„œ ์ฒ˜๋ฆฌ

DMA/Cache ๋ฐ DMA/VM ์ƒํ˜ธ์ž‘์šฉ

์ „์ฒด ์‹œ๋‚˜๋ฆฌ์˜ค โ€” ํ”„๋กœ๊ทธ๋žจ ์‹คํ–‰ ์ค‘ DMA ๋™์ž‘

๋‹ค์Œ์€ ๋‘ ํ”„๋กœ์„ธ์Šค P0, P1์ด ๋™์ž‘ํ•˜๊ณ  DMA๊ฐ€ I/O๋ฅผ ์ˆ˜ํ–‰ํ•˜๋Š” ์ „์ฒด ํ๋ฆ„:

  1. P0 ์‹คํ–‰ โ†’ Timer ์„ค์ •
  2. TLB Miss โ†’ exception โ†’ TLB ์—…๋ฐ์ดํŠธ
  3. Page fault โ†’ DMA์—๊ฒŒ ๋ช…๋ น ์ „๋‹ฌ
  4. OS๊ฐ€ DMA command register์— ๋ช…๋ น ์ž‘์„ฑ (kernel โ†’ ์ซ“๊ฒจ๋‚˜์ง€ X)
  5. DMA ์ž‘์—… ์ค‘ Context Switching (P0 โ†’ P1)
  6. P1 ์‹คํ–‰ (TLB miss ๋‚˜์ง€๋งŒ DRAM์— ์žˆ๊ธฐ์— ๊ณ„์† ์‚ฌ์šฉ)
  7. DMA ์ผ์„ ๋‹ค ํ•จ โ†’ Interrupt Controller๊ฐ€ OS์— ์•Œ๋ฆผ
  8. P1์˜ ์‹œ๊ฐ„์ด ๋‚จ์•„์„œ ๊ณ„์† ์‚ฌ์šฉ
  9. P1 ์‹œ๊ฐ„์ด ๋๋‚˜์„œ P0์— ์ œ์–ด๊ถŒ ์ค‘ โ†’ TLB Hit โ†’ PA ๋ณ€๊ฒฝ โ†’ Cache โ†’ Data ์‚ฌ์šฉ
  10. OS๊ฐ€ ๋ช…๋ น (SA+VA) โ†’ HDD I/O Controller โ†’ HDD

์ด๋Ÿฐ ์‹์œผ๋กœ DMA, Timer, TLB, Page table, Cache๊ฐ€ ๋ณตํ•ฉ์ ์œผ๋กœ ์ž‘๋™.

์ „์ฒด I/O ์‹œ๋‚˜๋ฆฌ์˜ค

RAID (Redundant Array of Inexpensive Disks)

๋””์Šคํฌ ์—ฌ๋Ÿฌ ๊ฐœ๋ฅผ ๋ฌถ์–ด ์‹ ๋ขฐ์„ฑ + ์„ฑ๋Šฅ์„ ๋™์‹œ์— ์–ป๋Š” ๊ธฐ๋ฒ•.

RAID 0 (Striping)

  • ๋ฐ์ดํ„ฐ๋ฅผ ์—ฌ๋Ÿฌ disk์— ๋‚˜๋ˆ„์–ด ์ €์žฅ (stripe)
  • ์žฅ์ : ์„ฑ๋Šฅ โ†‘ (๋ณ‘๋ ฌ read/write)
  • ๋‹จ์ : redundancy ์—†์Œ โ†’ ํ•˜๋‚˜ ๊ณ ์žฅ๋‚˜๋ฉด ๋ฐ์ดํ„ฐ ์†์‹ค

RAID 1 (Mirroring)

  • ๋™์ผ ๋ฐ์ดํ„ฐ๋ฅผ ๋‘ disk์— ๋ณต์ œ
  • ์žฅ์ : Reliability โ†‘ (ํ•˜๋‚˜ ๊ณ ์žฅ๋‚˜๋„ ๋‹ค๋ฅธ ์ชฝ ์‚ฌ์šฉ)
  • ๋‹จ์ : ์šฉ๋Ÿ‰ ์ ˆ๋ฐ˜, ๋น„์šฉ โ†‘

RAID 2, 3 (์ด์ „ RAID)

  • Bit-level / Byte-level parity (์ž˜ ์•ˆ ์”€)

RAID 4 (Block-Interleaved Parity)

  • Block stripe + ๋ณ„๋„ parity disk 1๊ฐœ
  • ์ฝ๊ธฐ๋Š” ๋ณ‘๋ ฌ ๊ฐ€๋Šฅ, ์“ฐ๊ธฐ๋Š” parity disk๊ฐ€ bottleneck

RAID 5 (Block-Interleaved Distributed Parity)

  • RAID 4์˜ Parity Disk๋ฅผ ์ œ๊ฑฐ ํ›„, ๋ชจ๋“  Disk์— ๋‚˜๋ˆ„์–ด ์ €์žฅ
  • ๋ณ‘๋ ฌ์ ์ธ service๊ฐ€ ๊ฐ€๋Šฅํ•ด์ง
  • ์ผ๋ถ€ ๊ฒฝ์šฐ์—์„œ๋งŒ ๊ฐ€๋Šฅ, ๋น„์šฉ์€ RAID 4์™€ ๋™์ผ, Write์˜ ์„ฑ๋Šฅ โ†‘ (RAID 4 < RAID 5)

์˜ˆ:

      0    1    2    3    4
Stripe Unit D0  D1  D2  D3  P
           D4  D5  D6  P   D7
           D8  D9  P   D10 D11
           D12 P   D13 D14 D15
           P   D16 D17 D18 D19
  • Disk 0๊ณผ Disk 1 ๋™์‹œ์— ์—…๋ฐ์ดํŠธ ๊ฐ€๋Šฅ โ†’ ๋‹ค์‹œ Disk 0, 1, 3, 4 ์‚ฌ์šฉ
  • Disk 0๊ณผ Disk 4 ๋™์‹œ์— ์—…๋ฐ์ดํŠธ X (parity ์ถฉ๋Œ) โ†’ Disk 4 ๋‘˜ ์‚ฌ์šฉ X

RAID 6 (P+Q Redundancy)

  • 2๊ฐœ์˜ parity๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ 2๊ฐœ์˜ error์— ๋Œ€ํ•ด ๋ณต๊ตฌํ•ด์คŒ (Reed-Solomon Codes)
  • Parity P & Q โ†’ Data ์—…๋ฐ์ดํŠธ ์‹œ 6๋ฒˆ์˜ I/O๊ฐ€ ํ•„์š”
  • ์‹ ๋ขฐ๋„๊ฐ€ ์ค‘์š”ํ•œ ํ™˜๊ฒฝ์—์„œ ์‚ฌ์šฉ

Hot swapping: HDD ๊ต์ฒด ์‹œ ์ „์›์„ ๋„์ง€ ์•Š๊ณ  ๊ต์ฒด.

RAID 0-4 ๋ฐ RAID 5/6 RAID 5 ๋ฐ RAID 6 ์ƒ์„ธ

์ •๋ฆฌ

๊ฐœ๋… ํ•ต์‹ฌ
Dependability Reliability, Availability โ€” MTTF/MTTR/MTBF
Polling CPU๊ฐ€ status register ์ฃผ๊ธฐ์  ๊ฒ€์‚ฌ
Interrupt Device ์ด๋ฒคํŠธ ์‹œ CPU์— signal
DMA CPU ์—†์ด ๋ฉ”๋ชจ๋ฆฌ-I/O ์ง์ ‘ ์ „์†ก
RAID 0 Striping โ€” ์„ฑ๋Šฅ โ†‘
RAID 1 Mirroring โ€” ์‹ ๋ขฐ์„ฑ โ†‘
RAID 5 Distributed parity โ€” ์„ฑ๋Šฅ+์‹ ๋ขฐ์„ฑ ๊ท ํ˜•
RAID 6 P+Q redundancy โ€” 2๊ฐœ fault ํ—ˆ์šฉ

I/O๋Š” CPU ๊ด€์ ์—์„œ ๋ฉ”๋ชจ๋ฆฌ ์ ‘๊ทผ๋ณด๋‹ค ํ›จ์”ฌ ๋А๋ฆฌ๊ธฐ ๋•Œ๋ฌธ์— CPU๋ฅผ ์ตœ๋Œ€ํ•œ ํ™œ์šฉํ•˜๊ธฐ ์œ„ํ•œ ๋น„๋™๊ธฐ ๊ธฐ๋ฒ•(interrupt, DMA) ๊ณผ ๋‹ค์ค‘ ๋””์Šคํฌ๋ฅผ ํ™œ์šฉํ•œ ์‹ ๋ขฐ์„ฑ(RAID) ์ด ํ•ต์‹ฌ์ด๋‹ค.

๋น„์Šทํ•œ ๊ธ€ ์ถ”์ฒœ

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